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    <title>i-RISCV Cryptographic Support</title>
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    <description>The i-RISCV CPU provides a number of cryptographic support.&#xA;The cryptographic implementations are tested with the NIST ACVP framework using simulation.&#xA;The testing was conducted using the ACVP Parser.&#xA;The algorithm implementations are standalone, reusable RTL modules which are connected to the respective RISC-V ISA extensions. Thus apart from the RISC-V ISA, the algorithms can be instantiated in separate use cases or even extracted from the RTL code to a separate project; each core also ships with a documented C API for driving it from Verilator or an external project.</description>
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